JPH0627957Y2 - パワートランジスタ - Google Patents

パワートランジスタ

Info

Publication number
JPH0627957Y2
JPH0627957Y2 JP1988103064U JP10306488U JPH0627957Y2 JP H0627957 Y2 JPH0627957 Y2 JP H0627957Y2 JP 1988103064 U JP1988103064 U JP 1988103064U JP 10306488 U JP10306488 U JP 10306488U JP H0627957 Y2 JPH0627957 Y2 JP H0627957Y2
Authority
JP
Japan
Prior art keywords
emitter
output terminal
collector
electrode
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1988103064U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0224559U (en]
Inventor
徹 宝泉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP1988103064U priority Critical patent/JPH0627957Y2/ja
Publication of JPH0224559U publication Critical patent/JPH0224559U/ja
Application granted granted Critical
Publication of JPH0627957Y2 publication Critical patent/JPH0627957Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP1988103064U 1988-08-03 1988-08-03 パワートランジスタ Expired - Fee Related JPH0627957Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988103064U JPH0627957Y2 (ja) 1988-08-03 1988-08-03 パワートランジスタ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988103064U JPH0627957Y2 (ja) 1988-08-03 1988-08-03 パワートランジスタ

Publications (2)

Publication Number Publication Date
JPH0224559U JPH0224559U (en]) 1990-02-19
JPH0627957Y2 true JPH0627957Y2 (ja) 1994-07-27

Family

ID=31333545

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988103064U Expired - Fee Related JPH0627957Y2 (ja) 1988-08-03 1988-08-03 パワートランジスタ

Country Status (1)

Country Link
JP (1) JPH0627957Y2 (en])

Also Published As

Publication number Publication date
JPH0224559U (en]) 1990-02-19

Similar Documents

Publication Publication Date Title
CA1201820A (en) Semiconductor integrated circuit including a lead frame chip support
JP3154579B2 (ja) 半導体素子搭載用のリードフレーム
JPH0451053B2 (en])
JP3677519B2 (ja) 電力用半導体モジュール
JPS6393126A (ja) 半導体装置
US5151771A (en) High lead count circuit board for connecting electronic components to an external circuit
JPH0740790B2 (ja) 大電力パワ−モジユ−ル
JP2987088B2 (ja) Ｍｏｓ技術電力デバイスチィップ及びパッケージ組立体
JPH098192A (ja) 接続ピンを有するパワー半導体モジュール
JPH0397257A (ja) 大電力半導体装置
JPH0627957Y2 (ja) パワートランジスタ
EP0305993A2 (en) Power semiconductor device having electrode structures
US4984051A (en) Semiconductor device having directly connected source terminal
KR100360351B1 (ko) 2중 전계효과 트랜지스터 칩 및 그 실장방법
JPH0278265A (ja) リードフレームおよびそのリードフレームを使用した複合半導体装置
JPH0622997Y2 (ja) 絶縁物封止型半導体装置
JPH0719160Y2 (ja) 半導体装置
JP2693688B2 (ja) 多入出力低損失ボルテージレギュレータ
JPS601968A (ja) 半導体装置
JPH06224369A (ja) 半導体装置
JP2741281B2 (ja) リードフレームおよびこれを使用して製造された半導体装置
JPH05226568A (ja) 半導体装置
JPH07202097A (ja) 半導体装置及びリードフレーム
JPH0451476Y2 (en])
JPS633461B2 (en])

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees